LTC3732CUHF 查看數據表（PDF） - Linear Technology

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LTC3732CUHF

3-Phase, 5-Bit VID, 600kHz, Synchronous Buck Switching Regulator Controller

Linear Technology 

LTC3732

APPLICATIO S I FOR ATIO

bypassing close to the IC is necessary to supply the high

transient currents required by the MOSFET gate drivers

while keeping the 5V supply quiet enough so as not to

disturb the very small-signal high bandwidth of the current

comparators.

Topside MOSFET Driver Supply (CB, DB)

External bootstrap capacitors, CB, connected to the BOOST

pins, supply the gate drive voltages for the topside

MOSFETs. Capacitor CB in the Functional Diagram is

charged though diode DB from VCC when the SW pin is

low. When one of the topside MOSFETs turns on, the

driver places the CB voltage across the gate-source of the

desired MOSFET. This enhances the MOSFET and turns on

the topside switch. The switch node voltage, SW, rises to

VIN and the BOOST pin follows. With the topside MOSFET

on, the boost voltage is above the input supply (VBOOST =

VCC + VIN). The value of the boost capacitor CB needs to be

30 to 100 times that of the total input capacitance of the

topside MOSFET(s). The reverse breakdown of DB must be

greater than VIN(MAX).

Differential Amplifier

The IC has a true remote voltage sense capability. The

sensing connections should be returned from the load,

back to the differential amplifier’s inputs through a com-

mon, tightly coupled pair of PC traces. The differential

amplifier rejects common mode signals capacitively or

inductively radiated into the feedback PC traces as well as

ground loop disturbances. The differential amplifier out-

put signal is divided down through the VID DAC and is

compared with the internal, precision 0.6V voltage refer-

ence by the error amplifier.

The differential amplifier has a 0 to VCC common mode

input range and an output swing range of 0 to VCC – 1.2V.

The output uses an NPN emitter follower without any

internal pull-down current. A DC resistive load to ground

is required in order to sink current.

Output Voltage

The IC includes a digitally controlled 5-bit attenuator

producing output voltages as defined in Table 1. Output

voltages with 25mV increments are produced from 1.075V

to 1.850V.

Each VID digital input is pulled up to a logical high with an

internal 3µA. The input logic threshold is approximately

1.2V but the input circuit can withstand an input voltage of

up to 7V.

Table 1. VID Output Voltage Programming

CODE

VOUT

CODE

VOUT

B4 B3 B2 B1 B0

B4 B3 B2 B1 B0

1 0 0 0 0 1.450V 0 0 0 0 0 1.850V

1 0 0 0 1 1.425V 0 0 0 0 1 1.825V

1 0 0 1 0 1.400V 0 0 0 1 0 1.800V

1 0 0 1 1 1.375V 0 0 0 1 1 1.775V

1 0 1 0 0 1.350V 0 0 1 0 0 1.750V

1 0 1 0 1 1.325V 0 0 1 0 1 1.725V

1 0 1 1 0 1.300V 0 0 1 1 0 1.700V

1 0 1 1 1 1.275V 0 0 1 1 1 1.675V

1 1 0 0 0 1.250V 0 1 0 0 0 1.650V

1 1 0 0 1 1.225V 0 1 0 0 1 1.625V

1 1 0 1 0 1.200V 0 1 0 1 0 1.600V

1 1 0 1 1 1.175V 0 1 0 1 1 1.575V

1 1 1 0 0 1.150V 0 1 1 0 0 1.550V

1 1 1 0 1 1.125V 0 1 1 0 1 1.525V

1 1 1 1 0 1.100V 0 1 1 1 0 1.500V

1 1 1 1 1 1.075V 0 1 1 1 1 1.475V

Soft-Start/Run Function

The RUN/SS pin provides three functions: 1) ON/OFF, 2)

soft-start and 3) a defeatable short-circuit latch off timer.

Soft-start reduces the input power sources’ surge cur-

rents by gradually increasing the controller’s current limit

(proportional to an internal buffered and clamped VITH).

The latchoff timer prevents very short, extreme load

transients from tripping the overcurrent latch. A small

pull-up current (>5µA) supplied to the RUN/SS pin will

prevent the overcurrent latch from operating. A maximum

pullup current of 200µA is allowed into the RUN/SS pin

even though the voltage at the pin may exceed the absolute

maximum rating for the pin. This is because the current is

limited and an internal protection circuit is provided. The

following explanation describes how this function oper-

ates.

An internal 1.5µA current source charges up the CSS

capacitor. When the voltage on RUN/SS reaches 1.5V, the

3732f

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