JS48F4400PCZ00 查看數據表（PDF） - Numonyx -> Micron
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JS48F4400PCZ00 Datasheet PDF : 102 Pages
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Numonyx™ Wireless Flash Memory (W18)
Table 17: Erase and Program Times (Sheet 2 of 2)
Operation Symbol Parameter
Description (1)
Notes
VPP1
Typ Max
VPP2
Typ Max
Unit
W400 tEFP/W
Single Word
4
N/A N/A 3.1
16
µs
Program
W401 tEFP/PB
4-Kword Parameter Block
2,3
N/A
-
15
-
ms
W402 tEFP/MB
32-Kword Main Block
2,3
N/A
-
120
-
ms
Operation
Latency
W403
W404
tEFP/SETUP
tEFP/TRAN
EFP Setup
Program to Verify Transition
-
N/A
-
5
µs
N/A N/A 2.7 5.6
µs
W405
tEFP/VERIFY
Verify
N/A N/A 1.7 130 µs
Notes:
1.
Unless noted otherwise, all parameters are measured at TA = +25 °C and nominal voltages, and they are sampled, not
100% tested.
2.
Excludes external system-level overhead.
3.
Exact results may vary based on system overhead.
4.
W400-Typ is the calculated delay for a single programming pulse. W400-Max includes the delay when programming
within a new word-line.
5.
Some EFP performance degradation may occur if block cycling exceeds 10.
7.3
Note:
Reset Specifications
Specifications are for 130 nm and 90 nm devices unless otherwise stated.
Table 18: Reset Specifications
#
Symbol
Parameter (1)
Notes
Min
Max
Unit
P1
tPLPH
P2
tPLRH
RST# Low to Reset during Read
RST# Low to Reset during Block Erase
RST# Low to Reset during Program
1, 2, 3, 4
100
-
ns
1, 3, 4, 5
-
20
µs
1, 3, 4, 5
-
10
µs
P3
tVCCPH
VCC Power Valid to Reset
1,3,4,5,6
60
-
µs
Notes:
1.
These specifications are valid for all product versions (packages and speeds).
2.
The device may reset if tPLPH< tPLPHMin, but this is not guaranteed.
3.
Not applicable if RST# is tied to VCC.
4.
Sampled, but not 100% tested.
5.
If RST# is tied to VCC, the device is not ready until tVCCPH occurs after when VCC ≥ VCCMin.
6.
If RST# is tied to any supply/signal with VCCQ voltage levels, the RST# input voltage must not exceed VCC until VCC ≥
VCCMin.
November 2007
Order Number: 290701-18
Datasheet
43
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