r Tf0 g
PIC16C8X
TABLE 4-1: REGISTER FILE SUMMARY
Address Name
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
INDF
TMR0
PCL
STATUS (2)
FSR
PORTA
PORTB
EEDATA
EEADR
0Ah
PCLATH
0Bh
INTCON
Bank 1
80h
INDF
81h
OPTION
82h
PCL
83h
STATUS (2)
84h
FSR
85h
TRISA
86h
TRISB
87h
88h
EECON1
89h
EECON2
0Ah
PCLATH
0Bh
INTCON
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Uses contents of FSR to address data memory (not a physical register)
8-bit real-time clock/counter
Low order 8 bits of the Program Counter (PC)
IRP
RP1
RP0
TO
PD
Z
DC
Indirect data memory address pointer 0
—
—
—
RA4/T0CKI
RA3
RA2
RA1
RB7
RB6
RB5
RB4
RB3
RB2
RB1
Unimplemented location, read as '0'
EEPROM data register
EEPROM address register
—
—
—
Write buffer for upper 5 bits of the PC (1)
GIE
EEIE
T0IE
INTE
RBIE
T0IF
INTF
Uses contents of FSR to address data memory (not a physical register)
RBPU INTEDG T0CS
T0SE
Low order 8 bits of Program Counter (PC)
PSA
PS2
PS1
IRP
RP1
RP0
TO
PD
Z
DC
Indirect data memory address pointer 0
—
—
— PORTA data direction register
PORTB data direction register
Unimplemented location, read as '0'
—
—
—
EEIF
WRERR WREN WR
EEPROM control register 2 (not a physical register)
—
—
—
Write buffer for upper 5 bits of the PC (1)
GIE
EEIE
T0IE
INTE
RBIE
T0IF
INTF
Bit 0
Value on
Power-on
Reset
Value on all
other resets
(Note3)
C
RA0
RB0/INT
RBIF
---- ----
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
---x xxxx
xxxx xxxx
---- ----
xxxx xxxx
xxxx xxxx
---0 0000
0000 000x
---- ----
uuuu uuuu
0000 0000
000q quuu
uuuu uuuu
---u uuuu
uuuu uuuu
---- ----
uuuu uuuu
uuuu uuuu
---0 0000
0000 000u
PS0
C
RD
RBIF
---- ----
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
---1 1111
1111 1111
---- ----
---0 x000
---- ----
---0 0000
---- ----
1111 1111
0000 0000
000q quuu
uuuu uuuu
---1 1111
1111 1111
---- ----
---0 q000
---- ----
---0 0000
© 1995 Microchip Technology Inc.
DS30081F-page 13