PIC16LC8X-04 查看數據表（PDF） - Microchip Technology

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PIC16LC8X-04

8-Bit CMOS EEPROM Microcontrollers

Microchip Technology 

PIC16C8X

FIGURE 4-3: STATUS REGISTER (ADDRESS 03h, 83h)

R/W-0

IRP

bit7

bit 7:

R/W-0 R/W-0

R-1

R-1

R/W-x R/W-x R/W-x

RP1

RP0

TO

PD

Z

DC

C

R = Readable bit

bit0 W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n = Value at POR reset

IRP: Register Bank Select bit (used for indirect addressing)

0 = Bank 0, 1 (00h - FFh)

1 = Bank 2, 3 (100h - 1FFh)

The IRP bit is not used by the PIC16C8X. IRP should be maintained clear.

bit 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)

00 = Bank 0 (00h - 7Fh)

01 = Bank 1 (80h - FFh)

10 = Bank 2 (100h - 17Fh)

11 = Bank 3 (180h - 1FFh)

Each bank is 128 bytes. Only bit RP0 is used by the PIC16C8X. RP1 should be maintained clear.

bit 4:

TO: Time-out bit

1 = After power-up, CLRWDT instruction, or SLEEP instruction

0 = A WDT time-out occurred

bit 3:

PD: Power-down bit

1 = After power-up or by the CLRWDT instruction

0 = By execution of the SLEEP instruction

bit 2:

Z: Zero bit

1 = The result of an arithmetic or logic operation is zero

0 = The result of an arithmetic or logic operation is not zero

bit 1:

DC: Digit carry/borrow bit (for ADDWF and ADDLW instructions) (For borrow the polarity is reversed)

1 = A carry-out from the 4th low order bit of the result occurred

0 = No carry-out from the 4th low order bit of the result

bit 0:

C: Carry/borrow bit (for ADDWF and ADDLW instructions)

1 = A carry-out from the most significant bit of the result occurred

0 = No carry-out from the most significant bit of the result occurred

Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of

the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low

order bit of the source register.

© 1995 Microchip Technology Inc.

DS30081F-page 15

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