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PIC12F1822T-I/SL 查看數據表(PDF) - Microchip Technology

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PIC12F1822T-I/SL Datasheet PDF : 398 Pages
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PIC12F/LF1822/16F/LF1823
23.4.1 HALF-BRIDGE MODE
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCP1/P1A pin, while the complementary PWM
output signal is output on the P1B pin (see Figure 23-9).
This mode can be used for Half-Bridge applications, as
shown in Figure 23-9, or for Full-Bridge applications,
where four power switches are being modulated with
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in Half-
Bridge power devices. The value of the PDC<6:0> bits of
the PWM1CON register sets the number of instruction
cycles before the output is driven active. If the value is
greater than the duty cycle, the corresponding output
remains inactive during the entire cycle. See
Section 23.4.5 “Programmable Dead-Band Delay
Mode” for more details of the dead-band delay
operations.
Since the P1A and P1B outputs are multiplexed with
the PORT data latches, the associated TRIS bits must
be cleared to configure P1A and P1B as outputs.
FIGURE 23-8:
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
Period
Period
P1A(2)
Pulse Width
td
td
P1B(2)
(1)
(1)
(1)
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
PR2 register.
2: Output signals are shown as active-high.
FIGURE 23-9:
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Standard Half-Bridge Circuit (“Push-Pull”)
FET
Driver
+
P1A
-
FET
Driver
P1B
Load
+
-
Half-Bridge Output Driving a Full-Bridge Circuit
FET
Driver
P1A
FET
Driver
P1B
V+
Load
FET
Driver
FET
Driver
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 211

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