PIC12F/LF1822/16F/LF1823
TABLE 9-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register on
Page
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE TMR0IF
INTF
IOCIF
89
IOCAF
—
—
IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0
128
IOCAN
—
—
IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0
128
IOCAP
—
—
IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0
128
PIE1
TMR1GIE ADIE
RCIE
TXIE
SSP1IE CCP1IE TMR2IE TMR1IE
90
PIE2
OSFIE
C2IE(1)
C1IE
EEIE
BCL1IE
—
—
—
91
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSP1IF CCP1IF TMR2IF TMR1IF
92
PIR2
OSFIF
C2IF(1)
C1IF
EEIF
BCL1IF
—
—
—
93
STATUS
—
—
—
TO
PD
Z
DC
C
24
WDTCON
—
—
WDTPS4 WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN
101
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-down mode.
Note 1: PIC16F/LF1823 only.
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 97