PIC18F45J50-I/SOSQTP 查看數據表（PDF） - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

REGISTER 19-3: DMACON1: DMA CONTROL REGISTER 1 (ACCESS F88h)

R/W-0

SSCON1

bit 7

R/W-0

SSCON0

R/W-0

TXINC

R/W-0

RXINC

R/W-0

DUPLEX1

R/W-0

DUPLEX0

R/W-0

DLYINTEN

R/W-0

DMAEN

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

bit 5

bit 4

bit 3-2

bit 1

bit 0

SSCON<1:0>: SSDMA Output Control bits (Master modes only)

11 = SSDMA is asserted for the duration of 4 bytes; DLYINTEN is always reset low

01 = SSDMA is asserted for the duration of 2 bytes; DLYINTEN is always reset low

10 = SSDMA is asserted for the duration of 1 byte; DLYINTEN is always reset low

00 = SSDMA is not controlled by the DMA module; DLYINTEN bit is software-programmable

TXINC: Transmit Address Increment Enable bit

Allows the transmit address to increment as the transfer progresses.

1 = The transmit address is to be incremented from the initial value of TXADDR<11:0>

0 = The transmit address is always set to the initial value of TXADDR<11:0>

RXINC: Receive Address Increment Enable bit

Allows the receive address to increment as the transfer progresses.

1 = The receive address is to be incremented from the inti al value of RXADDR<11:0>

0 = The receive address is always set to the initial value of RXADDR<11:0>

DUPLEX<1:0>: Transmit/Receive Operating Mode Select bits

10 = SPI DMA operates in Full-Duplex mode, data is simultaneously transmitted and received

01 = DMA operates in Half-Duplex mode, data is transmitted only

00 = DMA operates in Half-Duplex mode, data is received only

DLYINTEN: Delay Interrupt Enable bit

Enables the interrupt to be invoked after the number of TCY cycles specified in DLYCYC<2:0> has

elapsed from the latest completed transfer.

1 = The interrupt is enabled, SSCON<1:0> must be set to ‘00’

0 = The interrupt is disabled

DMAEN: DMA Operation Start/Stop bit

This bit is set by the users’ software to start the DMA operation. It is reset back to zero by the DMA

engine when the DMA operation is completed or aborted.

1 = DMA is in session

0 = DMA is not in session

DS39931D-page 282

 2011 Microchip Technology Inc.

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