PIC18F45J50-I/SOSQTP 查看數據表（PDF） - Microchip Technology
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PIC18F45J50-I/SOSQTP
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PIC18F45J50-I/SOSQTP Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
FIGURE 30-6:
OSC1
CLKO AND I/O TIMING
Q4
Q1
10
CLKO
13
14
I/O pin
(Input)
17
I/O pin
(Output)
Old Value
Note:
20, 21
Refer to Figure 30-4 for load conditions.
Q2
Q3
11
19
18
12
16
15
New Value
TABLE 30-13: CLKO AND I/O TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ
Max Units Conditions
10
TOSH2CKL OSC1 to CLKO
—
75
200
ns (Note 1)
11
TOSH2CKH OSC1 to CLKO
—
75
200
ns (Note 1)
12
TCKR
CLKO Rise Time
—
15
30
ns (Note 1)
13
TCKF
CLKO Fall Time
—
15
30
ns (Note 1)
14
TCKL2IOV CLKO to Port Out Valid
—
— 0.5 TCY + 20 ns
15
TIOV2CKH Port In Valid before CLKO
0.25 TCY + 25 —
—
ns
16
TCKH2IOI Port In Hold after CLKO
0
—
—
ns
17
TOSH2IOV OSC1 (Q1 cycle) to Port Out Valid
—
50
150
ns
18
TOSH2IOI OSC1 (Q2 cycle) to Port Input Invalid
100
—
—
ns
(I/O in hold time)
19
TIOV2OSH Port Input Valid to OSC1
(I/O in setup time)
0
—
—
ns
20
TIOR
Port Output Rise Time
—
—
6
ns
21
TIOF
Port Output Fall Time
—
—
5
ns
22† TINP
INTx pin High or Low Time
TCY
—
—
ns
23† TRBP
RB<7:4> Change INTx High or Low
Time
TCY
—
—
ns
† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in EC mode, where CLKO output is 4 x TOSC.
DS39931D-page 512
2011 Microchip Technology Inc.
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