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PIC18F45J50-I/SOSQTP 查看數據表(PDF) - Microchip Technology

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PIC18F45J50-I/SOSQTP Datasheet PDF : 562 Pages
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PIC18F46J50 FAMILY
FIGURE 30-13:
SCKx
(CKP = 0)
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
SCKx
(CKP = 1)
78
79
79
78
SDOx
MSb
bit 6 - - - - - - 1
SDIx
MSb In
74
73
75, 76
bit 6 - - - - 1
Note: Refer to Figure 30-4 for load conditions.
LSb
LSb In
TABLE 30-21: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
73 TDIV2SCH, Setup Time of SDIx Data Input to SCKx Edge
35
TDIV2SCL
100
74 TSCH2DIL, Hold Time of SDIx Data Input to SCKx Edge
30
TSCL2DIL
83
75
TDOR
SDOx Data Output Rise Time
76
TDOF
SDOx Data Output Fall Time
78
TSCR
SCKx Output Rise Time (Master mode)
79
TSCF
SCKx Output Fall Time (Master mode)
— ns VDD = 3.3V,
VDDCORE = 2.5V
— ns VDD = 2.15V,
VDDCORE = 2.15V
— ns VDD = 3.3V,
VDDCORE = 2.5V
— ns VDD = 2.15V
25 ns PORTB or PORTC
25 ns PORTB or PORTC
25 ns PORTB or PORTC
25 ns PORTB or PORTC
DS39931D-page 520
2011 Microchip Technology Inc.

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