PIC18F45J50-I/SOSQTP 查看數據表（PDF） - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

FIGURE 30-21: EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING

TXx/CKx

pin

RXx/DTx

pin

121

121

120

122

Note: Refer to Figure 30-4 for load conditions.

TABLE 30-29: EUSARTx SYNCHRONOUS TRANSMISSION REQUIREMENTS

Param

No.

Symbol

Characteristic

Min

Max

120 TCKH2DTV Sync XMIT (Master and Slave)

Clock High to Data Out Valid

—

40

121 TCKRF

Clock Out Rise Time and Fall Time (Master mode)

—

20

122 TDTRF Data Out Rise Time and Fall Time

—

20

Units Conditions

ns

ns

ns

FIGURE 30-22: EUSARTx SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING

TXx/CKx

pin

RXx/DTx

pin

125

126

Note: Refer to Figure 30-4 for load conditions.

TABLE 30-30: EUSARTx SYNCHRONOUS RECEIVE REQUIREMENTS

Param.

No.

Symbol

Characteristic

Min Max

125 TDTV2CKL Sync RCV (Master and Slave)

Data Hold before CKx  (DTx hold time)

10

—

126 TCKL2DTL Data Hold after CKx  (DTx hold time)

15

—

Units

ns

ns

Conditions

DS39931D-page 528

 2011 Microchip Technology Inc.

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