PIC16LC717T-I/SO 查看數據表（PDF） - Microchip Technology
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PIC16LC717T-I/SO Datasheet PDF : 200 Pages
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PIC16C717/770/771
G
GCE .................................................................................... 70
General Call Address Sequence......................................... 83
General Call Address Support ............................................ 83
General Call Enable bit, GCE ............................................. 70
I
I/O Ports .............................................................................. 27
I2C ....................................................................................... 77
I2C Master Mode Receiver Flowchart ................................. 96
I2C Master Mode Reception................................................ 95
I2C Master Mode Restart Condition .................................... 89
I2C Mode Selection ............................................................. 77
I2C Module
Acknowledge Flowchart .............................................. 99
Acknowledge Sequence timing ................................... 98
Addressing .................................................................. 78
Baud Rate Generator .................................................. 86
Block Diagram............................................................. 84
BRG Block Diagram .................................................... 86
BRG Reset due to SDA Collision .............................. 105
BRG Timing ................................................................ 86
Bus Arbitration .......................................................... 103
Bus Collision ............................................................. 103
Acknowledge..................................................... 103
Restart Condition .............................................. 106
Restart Condition Timing (Case1)..................... 106
Restart Condition Timing (Case2)..................... 106
Start Condition .................................................. 104
Start Condition Timing .............................. 104, 105
Stop Condition .................................................. 107
Stop Condition Timing (Case1)......................... 107
Stop Condition Timing (Case2)......................... 107
Transmit Timing ................................................ 103
Bus Collision timing................................................... 103
Clock Arbitration........................................................ 102
Clock Arbitration Timing (Master Transmit)............... 102
Conditions to not give ACK Pulse ............................... 78
General Call Address Support .................................... 83
Master Mode ............................................................... 84
Master Mode 7-bit Reception timing ........................... 97
Master Mode Operation .............................................. 85
Master Mode Start Condition ...................................... 87
Master Mode Transmission......................................... 92
Master Mode Transmit Sequence ............................... 85
Master Transmit Flowchart ......................................... 93
Multi-Master Communication .................................... 103
Multi-master Mode ...................................................... 85
Operation .................................................................... 77
Repeat Start Condition timing ..................................... 89
Restart Condition Flowchart........................................ 90
Slave Mode ................................................................. 78
Slave Reception .......................................................... 79
Slave Transmission..................................................... 79
SSPBUF...................................................................... 78
Start Condition Flowchart............................................ 88
Stop Condition Flowchart .......................................... 101
Stop Condition Receive or Transmit timing............... 100
Stop Condition timing ................................................ 100
Waveforms for 7-bit Reception ................................... 80
Waveforms for 7-bit Transmission .............................. 80
I2C Module Address Register, SSPADD............................. 78
I2C Slave Mode ................................................................... 78
ID Locations .............................................................. 125, 139
In-Circuit Serial Programming (ICSP) ....................... 125, 139
INDF.................................................................................... 15
INDF Register ............................................................... 13, 14
Indirect Addressing ............................................................. 25
FSR Register .............................................................. 11
Instruction Format............................................................. 141
Instruction Set................................................................... 141
ADDLW..................................................................... 143
ADDWF..................................................................... 143
ANDLW..................................................................... 143
ANDWF..................................................................... 143
BCF .......................................................................... 143
BSF........................................................................... 143
BTFSC ...................................................................... 144
BTFSS ...................................................................... 144
CALL......................................................................... 144
CLRF ........................................................................ 144
CLRW ....................................................................... 144
CLRWDT .................................................................. 144
COMF ....................................................................... 145
DECF ........................................................................ 145
DECFSZ ................................................................... 145
GOTO ....................................................................... 145
INCF ......................................................................... 145
INCFSZ..................................................................... 145
IORLW ...................................................................... 146
IORWF...................................................................... 146
MOVF ....................................................................... 146
MOVLW .................................................................... 146
MOVWF .................................................................... 146
NOP .......................................................................... 146
RETFIE ..................................................................... 147
RETLW ..................................................................... 147
RETURN................................................................... 147
RLF ........................................................................... 147
RRF .......................................................................... 147
SLEEP ...................................................................... 147
SUBLW ..................................................................... 148
SUBWF..................................................................... 148
SWAPF ..................................................................... 148
XORLW .................................................................... 148
XORWF .................................................................... 148
Summary Table ........................................................ 142
INTCON .............................................................................. 15
INTCON Register................................................................ 18
GIE Bit ........................................................................ 18
INTE Bit ...................................................................... 18
INTF Bit ...................................................................... 18
PEIE Bit ...................................................................... 18
RBIE Bit ...................................................................... 18
RBIF Bit ................................................................ 18, 35
T0IE Bit ....................................................................... 18
T0IF Bit ....................................................................... 18
Inter-Integrated Circuit (I2C) ............................................... 67
internal sampling switch (Rss) impedence ....................... 121
Interrupt Sources ...................................................... 125, 135
Block Diagram .......................................................... 135
Capture Complete (CCP)............................................ 56
Compare Complete (CCP).......................................... 56
RB0/INT Pin, External............................................... 136
TMR0 Overflow................................................... 48, 136
TMR1 Overflow..................................................... 49, 51
TMR2 to PR2 Match ................................................... 54
TMR2 to PR2 Match (PWM) ................................. 53, 58
Interrupts
Synchronous Serial Port Interrupt............................... 20
Interrupts, Context Saving During..................................... 136
DS41120A-page 192
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