ST7FMC1M2T3 查看數據表（PDF） - STMicroelectronics

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ST7FMC1M2T3

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

LINSCI™ SERIAL COMMUNICATION INTERFACE (LIN Mode) (cont’d)

Figure 66. SCI Block Diagram in LIN Slave Mode

Write

Read

(DATA REGISTER) SCIDR

TDO

Transmit Data Register (TDR)

Received Data Register (RDR)

Transmit Shift Register

Receive Shift Register

RDI

SCICR1

R8 T8 SCID M WAKE PCE PS PIE

TRANSMIT

CONTROL

WAKE

UP

UNIT

SCICR2

TIE TCIE RIE ILIE TE RE RWU SBK

RECEIVER

CONTROL

RECEIVER

CLOCK

SCISR

TDRE

TC

RDRF IDLE

OR/

LHE

NF

FE

PE

SCI

INTERRUPT

CONTROL

TRANSMITTER

CLOCK

fCPU

LIN SLAVE BAUD RATE

AUTO SYNCHRONIZATION

UNIT

SCIBRR

LPR7

LPR0

fCPU / LDIV

/16

SCICR3

LDUM LINE LSLV LASE LHDM LHIE LHDF LSF

CONVENTIONAL BAUD RATE

GENERATOR

+

EXTENDED PRESCALER

0

1

LIN SLAVE BAUD RATE GENERATOR

124/309

1

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