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ST92E163N4D0 查看數據表(PDF) - STMicroelectronics

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ST92E163N4D0 Datasheet PDF : 224 Pages
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ST92163 - ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (Cont’d)
Parameter
I2C Bus Timings
Symbol
Standard I2C
Min
Max
Bus free time between a STOP and START con-
dition
TBUF
4.7
Hold time START condition. After this period,
the first clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
THD:STA
TLOW
THIGH
TSU:STA
THD:DAT
TSU:DAT
TR
TF
4.0
4.7
4.0
4.7
0 (1)
250
1000
300
Set-up time for STOP condition
Capacitive load for each bus line
TSU:STO 4.0
Cb
400
Fast I2C
Min
Max
1.3
0.6
1.3
0.6
0.6
0 (1)
100
20+0.1Cb
20+0.1Cb
0.6
0.9(2)
300
300
400
Unit
ms
µs
µs
µs
µs
ns
ns
ns
ns
ns
pF
1)The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the unde-
fined region of the falling edge of SCL
2)The maximum hold time of the START condition has only to be met if the interface does not stretch the low period
of SCL signal
Cb = total capacitance of one bus line in pF
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