Z8018010PSC 查看數據表（PDF） - Zilog
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Z8018010PSC Datasheet PDF : 70 Pages
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Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
DMA MODE REGISTER (DMODE).
DMODE is used to set the addressing and transfer mode
for channel 0.
Mnemonic DMODE
Address 31H
Bit
7
6
5
4
3
2
1
0
DM1 DM0 SM1 SM0 MMOD
R/W R/W R/W R/W R/W
Figure 73. DMA Mode Register (DMODE: I/O Address = 31H)
Zilog
DM1, DM0: Destination Mode Channel 0 (bits 5,4) spec-
ifies whether the destination for channel 0 transfers is
memory or I/O, and whether the address should be incre-
mented or decremented for each byte transferred. DM1
and DM0 are cleared to 0 during RESET.
Table 10. Channel 0 Destination
DM1
0
0
1
1
DM0
0
1
0
1
Memory I/O
Memory
Memory
Memory
I/O
Memory
Increment/Decrement
+1
–1
fixed
fixed
SM1, SM0: Source Mode Channel 0 (bits 3, 2) specifies
whether the source for channel 0 transfers is memory or
I/O, and whether the address should be incremented or
decremented for each byte transferred.
Table 11. Channel 0 Source
SM1
0
0
1
1
SM0
0
1
0
1
Memory I/O
Memory
Memory
Memory
I/O
Memory
Increment/Decrement
+1
–1
fixed
fixed
1-56
PRELIMINARY
DS971800401
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