STM32F051R4U7(2012) 查看數據表（PDF） - STMicroelectronics

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STM32F051R4U7
(Rev.:2012)

Low- and medium-density advanced ARM™-based 32-bit MCU with 16 to 64 Kbytes Flash, timers, ADC, DAC and comm. interfaces

STMicroelectronics 

Electrical characteristics

STM32F051x

Input/output AC characteristics

The definition and values of input/output AC characteristics are given in Figure 20 and

Table 52, respectively.

Unless otherwise specified, the parameters given are derived from tests performed under

ambient temperature and VDD supply voltage conditions summarized in Table 20.

Table 52. I/O AC characteristics(1)

OSPEEDRy

[1:0] value(1)

x0

01

Symbol

Parameter

fmax(IO)out Maximum frequency(2)

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

fmax(IO)out Maximum frequency(2)

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

fmax(IO)out Maximum frequency(2)

11

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

FM+

configuration

(4)

fmax(IO)out Maximum frequency(2)

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

Conditions

CL = 50 pF, VDD = 2 V to 3.6 V

CL = 50 pF, VDD = 2 V to 3.6 V

CL = 50 pF, VDD = 2 V to 3.6 V

CL = 50 pF, VDD = 2 V to 3.6 V

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2 V to 2.7 V

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2 V to 2.7 V

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2 V to 2.7 V

TBD

TBD

TBD

Min Max Unit

-

2 MHz

- 125(3)

ns

- 125(3)

- 10 MHz

- 25(3)

ns

- 25(3)

- 50 MHz

- 30 MHz

- 20 MHz

-

5(3)

-

8(3)

- 12(3)

ns

-

5(3)

-

8(3)

- 12(3)

- TBD MHz

- TBD

ns

- TBD

tEXTIpw

Pulse width of external

signals detected by the

EXTI controller

10 -

ns

1. The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the RM0091 reference manual for a description of

GPIO Port configuration register.

2. The maximum frequency is defined in Figure 20.

3. Guaranteed by design, not tested in production.

4. The I/O speed configuration is bypassed in FM+ I/O mode. Refer to the STM32F05xxx reference manual RM0091 for a

description of FM+ I/O mode configuration.

74/105

Doc ID 022265 Rev 3

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