PIC16(L)F1503
REGISTER 15-2: ADCON1: ADC CONTROL REGISTER 1
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
U-0
ADFM
ADCS<2:0>
—
bit 7
U-0
R/W-0/0
R/W-0/0
—
ADPREF<1:0>
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
bit 6-4
bit 3-2
bit 1-0
ADFM: ADC Result Format Select bit
1 = Right justified. Six Most Significant bits of ADRESH are set to ‘0’ when the conversion result is
loaded.
0 = Left justified. Six Least Significant bits of ADRESL are set to ‘0’ when the conversion result is
loaded.
ADCS<2:0>: ADC Conversion Clock Select bits
000 = FOSC/2
001 = FOSC/8
010 = FOSC/32
011 = FRC (clock supplied from an internal RC oscillator)
100 = FOSC/4
101 = FOSC/16
110 = FOSC/64
111 = FRC (clock supplied from an internal RC oscillator)
Unimplemented: Read as ‘0’
ADPREF<1:0>: ADC Positive Voltage Reference Configuration bits
00 = VRPOS is connected to VDD
01 = Reserved
10 = VRPOS is connected to external VREF+ pin(1)
11 = Reserved
Note 1: When selecting the VREF+ pin as the source of the positive reference, be aware that a minimum voltage
specification exists. See Section 28.0 “Electrical Specifications” for details.
DS40001607D-page 120
2011-2015 Microchip Technology Inc.