ST7PLITEU09M3TR 查看數據表（PDF） - STMicroelectronics

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ST7PLITEU09M3TR

8-bit MCU with single voltage Flash memory, ADC, timers

STMicroelectronics 

ST7LITEU05 ST7LITEU09

13.9 CONTROL PIN CHARACTERISTICS

13.9.1 Asynchronous RESET Pin

TA = -40°C to 125°C, unless otherwise specified

Symbol

Parameter

Conditions

VIL

VIH

Vhys

VOL

RON

Input low level voltage

Input high level voltage

Schmitt trigger voltage hysteresis 1)

Output low level voltage 2)

Pull-up equivalent resistor 3)

tw(RSTL)out Generated reset pulse duration

th(RSTL)in External reset pulse hold time 4)

tg(RSTL)in Filtered glitch duration

VDD=5V IIO=+2mA

VIN=VSS

VDD=5V

VDD=3V

Internal reset sources

Min

VSS - 0.3

0.7xVDD

Typ

2

30

50

90 1)

90 1)

20

200

Max

0.3xVDD

VDD + 0.3

400

70

Unit

V

V

mV

kΩ

µs

µs

ns

Notes:

1. Data based on characterization results, not tested in production.

2. The IIO current sunk must always respect the absolute maximum rating specified in section 13.2.2 on page 75 and the

sum of IIO (I/O ports and control pins) must not exceed IVSS.

3. The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between

VILmax and VDD

4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on

RESET pin with a duration below th(RSTL)in can be ignored.

96/115

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