PIC18F46K80T-I/SP 查看數據表（PDF） - Microchip Technology

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PIC18F46K80T-I/SP

28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

Microchip Technology 

PIC18F66K80 FAMILY

11.1.4 ANALOG AND DIGITAL PORTS

Many of the ports multiplex analog and digital function-

ality, providing a lot of flexibility for hardware designers.

PIC18F66K80 family devices can make any analog pin

analog or digital, depending on an application’s needs.

The ports’ analog/digital functionality is controlled by

the registers: ANCON0 and ANCON1.

Setting these registers makes the corresponding pins

analog and clearing the registers makes the ports digi-

tal. For details on these registers, see Section 23.0

“12-Bit Analog-to-Digital Converter (A/D) Module”

11.1.5 PORT SLEW RATE

The output slew rate of each port is programmable to

select either the standard transition rate, or a reduced

transition rate of ten percent of the standard transition

time, to minimize EMI. The reduced transition time is

the default slew rate for all ports.

REGISTER 11-4: SLRCON: SLEW RATE CONTROL REGISTER

U-0

—

bit 7

R/W-0

SLRG(1)

R/W-0

SLRF(1)

R/W-0

SLRE(2)

R/W-0

SLRD(2)

R/W-0

SLRC(2)

R/W-0

SLRB

R/W-0

SLRA

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘0’

bit 6

SLRG: PORTG Slew Rate Control bit(1)

1 = All output pins on PORTG slew at 0.1 the standard rate

0 = All output pins on PORTG slew at standard rate

bit 5

SLRF: PORTF Slew Rate Control bit(1)

1 = All output pins on PORTF slew at 0.1 the standard rate

0 = RAll output pins on PORTF slew at standard rate

bit 4

SLRE: PORTE Slew Rate Control bit(2)

1 = All output pins on PORTE slew at 0.1 the standard rate

0 = All output pins on PORTE slew at standard rate

bit 3

SLRD: PORTD Slew Rate Control bit(2)

1 = All output pins on PORTD slew at 0.1 the standard rate

0 = All output pins on PORTD slew at standard rate

bit 2

SLRC: PORTC Slew Rate Control bit(2)

1 = All output pins on PORTC slew at 0.1 the standard rate

0 = All output pins on PORTC slew at standard rate

bit 1

SLRB: PORTB Slew Rate Control bit

1 = All output pins on PORTB slew at 0.1 the standard rate

0 = All output pins on PORTB slew at standard rate

bit 0

SLRA: PORTA Slew Rate Control bit

1 = All output pins on PORTA slew at 0.1 the standard rate

0 = All output pins on PORTA slew at standard rate

Note 1: These bits are unimplemented and read back as ‘0’ on 28-pin and 40/44-pin devices.

2: These bits are unimplemented and read back as ‘0’ on 28-pin devices.

DS39977F-page 174

 2010-2012 Microchip Technology Inc.

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