STM32F038x6
Electrical characteristics
Figure 13. High-speed external clock source AC timing diagram
9+6(+
9+6(/
WU+6(
WZ+6(+
WI+6(
7+6(
WZ+6(/
W
069
Low-speed external user clock generated from an external source
In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO.
The external clock signal has to respect the I/O characteristics in Section 6.3.13. However,
the recommended clock input waveform is shown in Figure 14.
Symbol
Table 30. Low-speed external user clock characteristics
Parameter(1)
Min
Typ
Max
fLSE_ext User external clock source frequency
VLSEH OSC32_IN input pin high level voltage
VLSEL OSC32_IN input pin low level voltage
tw(LSEH)
tw(LSEL)
OSC32_IN high or low time
tr(LSE)
tf(LSE)
OSC32_IN rise or fall time
1. Guaranteed by design, not tested in production.
-
0.7 VDDIOx
VSS
450
-
32.768
-
-
-
-
1000
VDDIOx
0.3 VDDIOx
-
50
Unit
kHz
V
ns
Figure 14. Low-speed external clock source AC timing diagram
9/6(+
9/6(/
WU/6(
WZ/6(+
WI/6(
7/6(
WZ/6(/
W
069
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