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ST72F324J2TCRE 查看數據表(PDF) - STMicroelectronics

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ST72F324J2TCRE Datasheet PDF : 194 Pages
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Power saving modes
ST72324xx-Auto
Figure 22. Slow mode clock transitions
fCPU
fOSC2/2
fOSC2/4
fOSC2
CP1:0 00
01
SMS
fOSC2
New Slow
frequency
request
Normal Run mode request
Obsolete Product(s) - Obsolete Product(s) 8.3
Wait mode
Wait mode places the MCU in a low power consumption mode by stopping the CPU.
This power saving mode is selected by calling the ‘WFI’ instruction.
All peripherals remain active. During Wait mode, the I[1:0] bits of the CC register are forced
to ‘10’ to enable all interrupts. All other registers and memory remain unchanged. The MCU
remains in Wait mode until an interrupt or reset occurs, whereupon the Program Counter
branches to the starting address of the interrupt or reset service routine. The MCU will
remain in Wait mode until a reset or an interrupt occurs, causing it to wake up. Refer to
Figure 23.
Figure 23. Wait mode flowchart
WFI instruction
Oscillator
on
Peripherals
on
CPU
off
I[1:0] bits
10
N
Reset
N
Y
Interrupt
Y
Oscillator
on
Peripherals
off
CPU
on
I[1:0] bits
10
256 or 4096 CPU clock
cycle delay
Oscillator
Peripherals
CPU
I[1:0] bits
on
on
on
XX(1)
Fetch reset vector
or service interrupt
1. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are
set to the current software priority level of the interrupt routine and recovered when the CC register is
popped.
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Doc ID 13841 Rev 1

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