C8051F521A-IM 查看數據表（PDF） - Silicon Laboratories
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C8051F521A-IM Datasheet PDF : 221 Pages
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C8051F52x/F53x
SFR Definition 18.4. TL0: Timer 0 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TL0: Timer 0 Low Byte.
The TL0 register is the low byte of the 16-bit Timer 0.
R/W
R/W
Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8A
SFR Definition 18.5. TL1: Timer 1 Low Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TL1: Timer 1 Low Byte.
The TL1 register is the low byte of the 16-bit Timer 1.
R/W
R/W
Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8B
SFR Definition 18.6. TH0: Timer 0 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TH0: Timer 0 High Byte.
The TH0 register is the high byte of the 16-bit Timer 0.
R/W
R/W
Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8C
SFR Definition 18.7. TH1: Timer 1 High Byte
R/W
R/W
R/W
R/W
R/W
R/W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bits 7–0: TH1: Timer 1 High Byte.
The TH1 register is the high byte of the 16-bit Timer 1.
R/W
R/W
Reset Value
00000000
Bit1
Bit0
SFR Address: 0x8D
Rev. 1.4
189
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