T2080NXE8MQLB 查看數據表（PDF） - NXP Semiconductors.

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T2080NXE8MQLB

T2080 QorIQ integrated multicore communications processor

NXP Semiconductors. 

Electrical characteristics

This figure represents the AC timing from Table 27 in master mode (internal clock). Note

that although the specifications generally reference the rising edge of the clock, these AC

timing diagrams also apply when the falling edge is the active edge. Also, note that the

clock edge is selectable on eSPI.

SPICLK (output)1

Input Signals:

Output Signals:

Output Signals:

SPI_CS[0:3] 1

tNIKHOV2

tNIIVKH

tNIKHOV

tNIIXKH

tNIKHOX

tNIKHOX2

Figure 14. eSPI AC timing in master mode (internal clock) diagram

NOTE

SPICLK appears on the interface only after CS assertion.

3.10 DUART interface Freescale Semiconductor

Freescale Confidential Proprietary

Preliminary—Subject to Change Without Notice

3

Freescale Internal Use Only

This section describes the DC and AC electrical specifications for the DUART interface.

3.10.1 DUART DC electrical characteristics

This table provides the DC electrical characteristics for the DUART interface at DVDD =

2.5 V.

Table 28. DUART DC electrical characteristics(2.5 V)3

Parameter

Symbol

Min

Input high voltage

Input low voltage

Input current (DVIN = 0 V or DVIN = DVDD)

Output high voltage (DVDD = min, IOH = -1 mA)

Output low voltage (DVDD = min, IOL = 1mA)

VIH

1.7

VIL

—

IIN

-50

VOH

2.0

VOL

—

Table continues on the next page...

Max

—

0.7

+50

—

0.4

Unit

V

V

μA

V

V

Notes

1

1

2

—

—

QorIQ T2080 Data Sheet, Rev. 3, 03/2018

NXP Semiconductors

71

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