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CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
16.23 Vertical Cursor End Register (VCER): Address 0x97
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1001 0111
XXXXXXXXXXXXX
VCER value
This 13-bit register defines the time, in units of a raster, from the start of the VSYNC pulse to the end of
the cursor display (that is, the first raster where the cursor is not present). If N rasters are required in this
time, then program the value (N 1) into the VCER.
16.24 Vertical Test Registers: Addresses 0x98, 0x9A and 0x9C
These registers are provided for test purposes only. None are intended for use during normal operation.
150
THE VIDEO SOUND AND PROGRAMMER’S MODEL
ADVANCE DATA BOOK v2.0
June 1997

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