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CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
19. FLOATING-POINT INSTRUCTION SET
NOTE: Not all of the instructions detailed in this chapter are implemented in hardware on the FPA; the remainder
are supported by software emulation. Details of the generic ARM coprocessor instruction set can be found
in Chapter 4.
19.1 Coprocessor Data Transfer
19.1.1 LDF/STF — Load and Store Floating
31
28 27
24 23 22 21 20 19
16 15
12 11
87
0
cond
110P
U/D Y Wb L/S
Rn
X Fd
0001
offset
Load or store the high-precision value from or to memory, using one of the five memory formats.
On store, the value is rounded using the round to nearest rounding method to the destination precision,
or is precise if the destination has sufficient precision. Thus, other rounding methods may be used by hav-
ing applied a suitable floating-point data operation at some time before the store; this does not compro-
mise the requirement of rounding once only since no additional rounding error is introduced by the store
instruction.
Cond
P
U/D
Y
Wb
L/S
Rn
X
Fd
offset
condition field
pre/post-indexing bit:
0
post-indexing
1
pre-indexing
up/down bit
0
down
1
up
transfer length (see below)
write-back bit
load/store bit
0
store to memory
1
load from memory
base register
transfer length (see below)
floating-point register number
unsigned 8-bit immediate offset
170
FLOATING-POINT INSTRUCTION SET
ADVANCE DATA BOOK v2.0
June 1997

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