CL-PS7500FE View Datasheet(PDF) - Cirrus Logic
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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
19.1.4 Assembler Syntax — Form 1
<LFM|SFM>{cond} Fd,<count>,[Rn]
[Rn, #<expression>]{!}
[Rn],#<expression>
The first register to transfer is specified as Fd.
The number of registers to transfer is specified in the <count> field and is encoded in bit 22 and bit 15 as
shown in Table 19-2.
Table 19-2. Count Field
Bit 22 Bit 15 No. of Registers to Transfer
0
1
1
1
0
2
1
1
3
0
0
4
Registers are always transferred in ascending order and wrap around at register F7. For example:
SFM F6,4,[R0]
transfers F6, F7, F0, and F1 to memory starting at the address contained in register R0.
Pre-Indexed Addressing Specification
[Rn]
[Rn, #<expression>]{!}
{!}
NOTE: If Rn is R15, writeback should not be specified.
offset of zero
offset of <expression> bytes
Write back the base register (set the Wb bit) if ! is
present.
Post-Indexed Addressing Specification
[Rn],#<expression>
offset of <expression> bytes
NOTE: The assembler automatically sets the Wb bit in this case. R15 should not be used as the base register where
post-indexed addressing is used.
The <expression> must be divisible by 4 and be in the range −1020 to 1020.
June 1997
ADVANCE DATA BOOK v2.0
FLOATING-POINT INSTRUCTION SET
173
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