CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

3. FUNCTIONAL DESCRIPTION

The CL-PS7500FE is a high-performance, low-power RISC-based single-chip computer built around an

ARM microprocessor core. To maximize the potential of the ARM processor macrocell, the CL-PS7500FE

contains memory and I/O control on-chip, enabling the direct connection of external memory devices and

peripherals with the minimum of external components. The FPA (floating-point accelerator) is also inte-

grated, resulting in outstanding math performance.

NOTE: The CL-PS7500FE is based on the ARM7500FE architecture from ARM Ltd., U.K. (http://www.arm.com).

The CL-PS7500FE includes features that make it particularly suitable for low-power portable applications.

Both 32- and 16-bit-wide memory systems are supported, allowing the design of a lower-cost 16-bit-

based system. The CL-PS7500FE drives color CRT or color LCD panels. Monochrome single- or dual-

panel LCDs with 16 levels of greyscaling can also be driven. Power-management circuitry is included with

two power-saving states. The high level of integration achieved allows significant PCB area saving, and

results in a very cost-competitive system.

The CL-PS7500FE is also particularly suited to any application requiring high-quality video, sound, and

general I/O requirements, such as multimedia. The video controller provides up to 16 million colors from

a 256-entry palette, running at up to a 120-MHz pixel clock rate. The sound subsystem includes a serial

sound interface for CD-quality 32-bit sound. Four on-chip A-to-D converters allow the connection of ana-

log joysticks or similar control devices. The clocking scheme is very flexible, allowing either a very cheap

system to be built using a single oscillator, or separate asynchronous clocks to be used for the CPU, mem-

ory and I/O subsystems, which gives an extremely flexible system, able to take advantage of the fastest

available DRAM memory.

3.1 Functional Block Diagram

Figure 3-1 on page 28 presents a more detailed view of the functionality of the CL-PS7500FE single-chip

computer.

3.2 ARM Processor Macrocell

The ARM processor contains an ARM7 core with MMU, 4-Kbyte cache, and write buffer.

3.3 FPA Macrocell

The FPA is a fully IEEE-754 compliant floating-point accelerator, and supports single, double, and

extended precision formats. It is connected to the ARM through the coprocessor interface and provides

the same floating-point functionality as the FPA11.

Concurrent load/store and arithmetic units, and speculative execution are employed to give good floating-

point performance.

June 1997

ADVANCE DATA BOOK v2.0

27

FUNCTIONAL DESCRIPTION

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