CL-PS7500FE View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
3.4 Video and Sound Macrocell
The video and sound macrocell gives the CL-PS7500FE the flexibility to drive high analog CRT or low
power LCD displays, and features the following:
q Up to 120-MHz pixel clock rate
q Resolutions of up to 1024 × 768 pixels are directly supported
(greater if external serialization is used)
q Fully programmable display parameters
q 256-entry by 28-bit video palette
q Red, green and blue 8-bit linear DACs to drive CRT
q 1-, 2-, 4-, 8-, 16-, and 32-bpp CRT modes
q Up to 16 million colors
q External bits in palette for supremacy, fading, HiRes
q Single- or dual-panel LCD driving
q 16-level gray scalar for LCD
q Power management features
q Hardware cursor for all display modes
q Sound system — serial CD digital output
3.5 Clock Control and Power Management
The clocking strategy for CL-PS7500FE has been designed for maximum flexibility, and includes separate
clock inputs for the:
q CPU core clock
q Memory system clock
q I/O system clock (in addition to the video clock inputs).
Each of the three clock inputs has a selectable divide-by-two prescalar to generate an internal 50/50
mark-space ratio if required. Throughout this data book, all timing diagrams assume that CPUCLK, MEM-
CLK, and I_OCLK are divided by one.
There are two levels of power management included:
q SUSPEND mode: The clock to the CPU is stopped, but the display continues to work normally, that is, DMA
unaffected.
q STOP mode: All clocks are stopped. Two asynchronous wake-up event pins are provided to terminate stop
mode. Circuitry is included on-chip to stop external oscillators and restart them cleanly when required.
3.6 Memory System
The memory system interface control logic is completely asynchronous in operation to the I/O control
logic. This means that the clock to the memory controller can be increased in frequency to allow faster
memory to be used. This implementation gives maximum system flexibility.
June 1997
ADVANCE DATA BOOK v2.0
29
FUNCTIONAL DESCRIPTION
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