FDC37B80X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37B80X
SMSC -> Microchip
FDC37B80X Datasheet PDF : 194 Pages
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nDIR
nSTEP
nDS0-3
nINDEX
nRDATA
nWDATA
nIOW
nDS0-1,
MTR0-1
t3
t4
t1
t2
t5
t6
t7
t8
t9
FIGURE 9 - DISK DRIVE TIMING (AT MODE ONLY)
NAME
t1
t2
t3
t4
t5
t6
t7
t8
t9
DESCRIPTION
nDIR Set Up to STEP Low
nSTEP Active Time Low
nDIR Hold Time after nSTEP
nSTEP Cycle Time
nDS0-1 Hold Time from nSTEP Low
nINDEX Pulse Width
nRDATA Active Time Low
nWDATA Write Data Width Low
nDS0-1, MTRO-1 from End of nIOW
MIN
TYP
4
24
96
132
20
2
40
.5
25
*X specifies one MCLK period and Y specifies one WCLK period.
MCLK = 16 x Data Rate (at 500 kb/s MCLK = 8 MHz)
WCLK = 2 x Data Rate (at 500 kb/s WCLK = 1 MHz)
t9
MAX
UNITS
X*
X*
X*
X*
X*
X*
ns
Y*
ns
173
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