COM20022V-HT View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
COM20022V-HT Datasheet PDF : 88 Pages
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DATA
0000 1000
0001 1000
0001 0000
COMMAND
Clear
Receive
Interrupt
Start Internal
Operation
Clear Mask bit of
DMAEND
DESCRIPTION
This command is used only in the Command Chaining operation.
Please refer to the Command Chaining section for definition of
this command.
This command restarts the stopped internal operation after
changing CKUP1 or CKUP0 bit.
This command resets a mask bit of the DMAEND. It is for
clearing interrupt by DMA transfer finished.
BIT
BIT NAME
7 Read Data
6 Auto Increment
5-4 (Reserved)
3 DMA Enable
2-0 Address 10-8
Table 7 - Address Pointer High Register
SYMBOL
DESCRIPTION
RDDATA
This bit tells the COM20022 whether the following access
will be a read or write. A logic "1" prepares the device for a
read, a logic "0" prepares it for a write.
AUTOINC
This bit controls whether the address pointer will increment
automatically. A logic "1" on this bit allows automatic
increment of the pointer after each access, while a logic "0"
disables this function. Please refer to the Sequential
Access Memory section for further detail.
These bits are undefined.
DMAEN
This bit is used to Disable/Enable the assertion of the
DMA Request (DREQ pin) after writing the Address
Pointer Low register. DMAEN=0: Disable (Default).
DMAEN=1: Enable the assertion of the DREQ pin after
writing the Address Pointer Low register. Writing
DMAEN=0 during the DMA operation will negate the
DREQ pin immediately. The DMA operation is terminated
immediately after the next DACK pin negation. The
inverting signal of DAMEN is the Interrupt source signal
DMAEND. The DMAEN bit is cleared automatically by
finishing the DMA. If the DMAEND bit in the Mask register
is not masked, the Interrupt occurs by finishing the DMA
operation.
A10-A8
These bits hold the upper three address bits which provide
addresses to RAM.
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