COM20022V-HT View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

COM20022V-HT

10Mbps ARCNET controller with 2Kx8 on-board RAM

SMSC -> Microchip 

Tarb is Topr at SLOWARB=0 and Tarb is 2Topr at SLOWARB=1.

Topr is the period of Operation Clock Frequency. It depends on the CKUP1 and CKUP0 bits.

Note 2: Txtl is a period of external XTAL oscillation frequency.

Note 3: The nREFEX pin must not be Low while nDACK is Low.

Note 4: “Write” means write signal and “Read” means read signal. “Write/Read” means write or read

signal.

At INTEL MODE, write signal is nWR and read signal is nRD.

At MOTOROLA MODE, write signal is nDS when DIR is Low and the read signal is nDS

when DIR is High.

Note 5: Conditions of CASE1W, CASE2W, CASE1R and CASE2R are shown below;

CASE1W : BUSTMG pin = High

CASE2W : BUSTMG pin = Low

CASE1R : BUSTMG pin = High and RBUSTMG bit = 0

CASE2R : BUSTMG pin = Low or RBUSTMG bit = 1

80

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