STV0672-chipsetf-3-1.fm
Pinout and pin descriptions
Name Pin Number Type
Description
OEB
16
ID↓
Digital output (tri-state) enable.
DIGITAL CONTROL SIGNALS
RESETB
21
SUSPEND
12
ID↑
System Reset. Active Low.
May be configured as System Sync. Active Low.
ID↑
USB Suspend Mode Control signal. Active High
If this feature is not required then the support circuit must pull the pin to
ground. The combination of an active high signal and pull up pad was
chosen to limit current drawn by the device while in suspend mode.
SERIAL INTERFACE
SCL
15
SDA
14
BI↑
Serial bus clock (input only).
BI↑
Serial bus data (bidirectional, open drain).
SYSTEM CLOCKS
CLKI
30
ID↓
Schmitt Buffered Clock input or LVDS positive Clock input
1. Vbloom pin was bonded on pre-production samples but will not be bonded on production parts
2. VBLTW pin was bonded on pre-production samples but will not be bonded on production parts
3. VRT pin was bonded on pre-production samples but will not be bonded on production parts
Key
A
OA
BI
BI↑
BI↓
Analog Input
Analog Output
Bidirectional
Bidirectional with internal pull-up
Bidirectional with internal pull-down
D
ID↑
ID↓
OD
ODT
Digital Input
Digital input with internal pull-up
Digital input with internal pull-down
Digital Output
Tri-stateable Digital Output
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29 November 2000
Commercial in confidence