PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F8520-IPT301
Microchip Technology
PIC18F8520-IPT301 Datasheet PDF : 380 Pages
| |||
PIC18F6520/8520/6620/8620/6720/8720
SLEEP
Enter SLEEP mode
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
[ label ] SLEEP
None
00h WDT,
0 WDT postscaler,
1 TO,
0 PD
TO, PD
0000 0000 0000 0011
The Power-down status bit (PD) is
cleared. The Time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Q2
No
operation
Q3
Process
Data
Q4
Go to
Sleep
Example:
SLEEP
Before Instruction
TO = ?
PD = ?
After Instruction
TO = 1 †
PD = 0
† If WDT causes wake-up, this bit is cleared.
SUBFWB
Subtract f from W with borrow
Syntax:
[ label ] SUBFWB f [,d [,a]
Operands:
0 f 255
d [0,1]
a [0,1]
Operation:
(W) – (f) – (C) dest
Status Affected: N, OV, C, DC, Z
Encoding:
0101 01da ffff ffff
Description:
Subtract register ‘f’ and Carry flag
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored in register ‘f’ (default). If ‘a’ is
‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example 1:
SUBFWB REG, 1, 0
Before Instruction
REG
W
C
=3
=2
=1
After Instruction
REG
W
C
Z
N
= FF
=2
=0
=0
= 1 ; result is negative
Example 2:
SUBFWB REG, 0, 0
Before Instruction
REG
W
C
=2
=5
=1
After Instruction
REG
W
C
Z
N
=2
=3
=1
=0
=0
; result is positive
Example 3:
SUBFWB REG, 1, 0
Before Instruction
REG
W
C
=1
=2
=0
After Instruction
REG
W
C
Z
N
=0
=2
=1
=1
=0
; result is zero
DS39609C-page 294
2003-2013 Microchip Technology Inc.
Share Link: 