PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18F8520-IPT301
Microchip Technology
PIC18F8520-IPT301 Datasheet PDF : 380 Pages
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PIC18F6520/8520/6620/8620/6720/8720
SUBLW
Subtract W from literal
Syntax:
[ label ] SUBLW k
Operands:
0 k 255
Operation:
k – (W) W
Status Affected: N, OV, C, DC, Z
Encoding:
0000 1000 kkkk kkkk
Description:
W is subtracted from the eight-bit
literal ‘k’. The result is placed in
W.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal ‘k’
Process
Data
Write to W
Example 1:
SUBLW 0x02
Before Instruction
W
=1
C
=?
After Instruction
W
=1
C
=1
Z
=0
N
=0
; result is positive
Example 2:
SUBLW 0x02
Before Instruction
W
=2
C
=?
After Instruction
W
=0
C
=1
Z
=1
N
=0
; result is zero
Example 3:
SUBLW 0x02
Before Instruction
W
=3
C
=?
After Instruction
W
= FF
C
=0
Z
=0
N
=1
; (2’s complement)
; result is negative
SUBWF
Subtract W from f
Syntax:
[ label ] SUBWF f [,d [,a]
Operands:
0 f 255
d [0,1]
a [0,1]
Operation:
(f) – (W) dest
Status Affected: N, OV, C, DC, Z
Encoding:
0101 11da ffff ffff
Description:
Subtract W from register ‘f’ (2’s
complement method). If ‘d’ is ‘0’,
the result is stored in W. If ‘d’ is
‘1’, the result is stored back in
register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected,
overriding the BSR value. If ‘a’ is
‘1’, then the bank will be selected
as per the BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Decode
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example 1:
SUBWF REG, 1, 0
Before Instruction
REG
W
C
=3
=2
=?
After Instruction
REG
W
C
Z
N
=1
=2
=1
=0
=0
; result is positive
Example 2:
SUBWF REG, 0, 0
Before Instruction
REG
W
C
=2
=2
=?
After Instruction
REG
W
C
Z
N
=2
=0
=1
=1
=0
; result is zero
Example 3:
SUBWF REG, 1, 0
Before Instruction
REG
W
C
=1
=2
=?
After Instruction
REG
W
C
Z
N
= FFh ;(2’s complement)
=2
= 0 ; result is negative
=0
=1
2003-2013 Microchip Technology Inc.
DS39609C-page 295
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