ST20-GP1 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST20-GP1

GPS PROCESSOR

STMicroelectronics 

ST20-GP1

Watchdog timer

The low power alarm counter is set to operate as a watchdog timer by setting the WdEnable

register to 1. This disables entering low power mode when starting the timer. The low power alarm

is programmed and started as normal.

The WdFlag register can be read to determine if the device was reset by the notRST input or by a

watchdog time-out.

When the low power alarm counts down to the value #1, the notWdReset pin is asserted low for 1

low power clock cycle. In addition an internal reset of the ST20-GP1 is performed.

10.3 Low power configuration registers

The low power controller is allocated a 4k block of memory in the internal peripheral address

space. Information on low power mode is stored in registers as detailed in the following section.

The registers can be examined and set by the devlw (device load word) and devsw (device store

word) instructions, see Table 6.19 on page 43. Note, they can not be accessed using memory

instructions.

LPTimerLS and LPTimerMS

The LPTimerLS and LPTimerMS registers are the least significant word and most significant word

of the LPTimer register. This enables the least significant or most significant word to be written

independently without affecting the other word.

LPTimerLS

Bit

Bit field

31:0 LPTimerLS

LPC base address + #400

Function

Least significant word of the low power timer.

Read/Write

Table 10.2 LPTimerLS register format

LPTimerMS

Bit

Bit field

31:0 LPTimerMS

LPC base address + #404

Function

Most significant word of the low power timer.

Read/Write

Table 10.3 LPTimerMS register format

When the LPTimer register is written, the low power timer is stopped and the new value is

available to be written to the low power timer.

LPTimerStart

A write to the LPTimerStart register starts the low power timer counter. The counter is stopped

and the LPTimerStart register reset if either counter word (LPTimerLS and LPTimerMS) is

written.

Note, setting the LPTimerStart register to zero does not stop the timer.

LPTimerStart

LPC base address + #408

Bit

Bit field

Function

0

LPTimerStart

A write to this bit starts the low power timer counter.

Write

Table 10.4 LPTimerStart register format

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