ST20-GP1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST20-GP1 Datasheet PDF : 116 Pages
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ST20-GP1
LPAlarmLS and LPAlarmMS
The LPAlarmLS and LPAlarmMS registers are the least significant word and most significant word
of the LPAlarm register. This is used to program the low power alarm.
LPAlarmLS
Bit
Bit field
31:0 LPAlarmLS
LPC base address + #410
Function
Least significant word of the low power alarm.
Read/Write
Table 10.5 LPAlarmLS register format
LPAlarmMS
Bit
Bit field
7:0
LPAlarmMS
LPC base address + #414
Function
Most significant word of the low power alarm.
Read/Write
Table 10.6 LPAlarmMS register format
LPAlarmStart
A write to the LPAlarmStart register starts the low power alarm counter. The counter is stopped
and the LPStart register reset if either counter word (LPTimerLS and LPTimerMS) is written.
LPAlarmStart
LPC base address + #418
Bit
Bit field
Function
0
LPAlarmStart
A write to this bit starts the low power alarm counter.
Write
Table 10.7 LPAlarmStart register format
LPSysPll
The LPSysPll register controls the System Clock PLL operation when low power mode is entered.
This allows a compromise between wake-up time and power consumption during stand-by.
LPSysPll
Bit
Bit field
1:0
LPSysPll
LPC base address + #420
Read/Write
Function
Determines the system clock PLL when low power mode is entered, as follows:
LPSysPll1:0 System clock
00
PLL off
01
PLL reference on and power on
10
PLL reference on and power on
11
PLL on
Table 10.8 LPSysPll register format
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