ULPI registers
8
ULPI registers
STULPI01A - STULPI01B
Table 13. ULPI register map overview
Field name
Immediate register set
Vendor ID Low
Vendor ID High
Product ID Low
Product ID High
Function Control
Interface Control
OTG Control
USB Interrupt Enable Rising
USB Interrupt Enable Falling
USB Interrupt Status Register
USB Interrupt Latch Register
Debug
Scratch
Car kit control register
Reserved
Access Extended Register Set (see Table 14)
Reserved
Power control
Extended register set
Maps to Immediate Register Set above
Reserved
Size (bits)
Address (6 bits)
Rd
Wr
Set
Clr
8
00h
-
-
-
8
01h
-
-
-
8
02h
-
-
-
8
03h
-
-
-
8
04-06h
04h
05h
06h
8
07-09h
07h
08h
09h
8
0A-0Ch 0Ah 0Bh 0Ch
8
0D-0Fh 0Dh 0Eh 0Fh
8
10-12h
10h
11h
12h
8
13h
-
-
-
8
14h
-
-
-
8
15h
-
-
-
8
16-18h
16h
17h
18h
8
16-1Bh
19h
1Ah
1Bh
8
1C-2Eh
8
-
2Fh
-
-
8
30-3Ch
3D-3Fh
Address (8 bits)
8
00-3Fh
8
40-FFh
Table 14. Register access legend
Access code Expanded name
Meaning
rd
Read
Register can be read. Read-only if this is the only mode given.
wr
Write
Pattern on the data bus will be written over all bits of the register.
s
Set
Pattern on the data bus is OR’d with and written into the register.
c
Clear
Pattern on the data bus is a mask. If a bit in the mask is set, then the
corresponding register bit will be set to zero (cleared).
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