PIC16LF1826-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF1826-I/SS

18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16F/LF1826/27

8.5.5

PIE4 REGISTER(1)

The PIE4 register contains the interrupt enable bits, as

shown in Register 8-5.

Note 1: The PIE4 register is available only on the

PIC16F/LF1827 device.

2: Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

REGISTER 8-5: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4(1)

U-0

—

bit 7

U-0

U-0

U-0

U-0

U-0

R/W-0/0

—

—

—

—

—

BCL2IE

R/W-0/0

SSP2IE

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7-2

bit 1

bit 0

Unimplemented: Read as ‘0’

BCL2IE: MSSP2 Bus Collision Interrupt Enable bit

1 = Enables the MSSP2 Bus Collision Interrupt

0 = Disables the MSSP2 Bus Collision Interrupt

SSP2IE: Master Synchronous Serial Port 2 (MSSP2) Interrupt Enable bit

1 = Enables the MSSP2 interrupt

0 = Disables the MSSP2 interrupt

Note 1: This register is only available on PIC16F/LF1827.

 2010 Microchip Technology Inc.

Preliminary

DS41391C-page 95

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