PIC16LF1826-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF1826-I/SS

18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16F/LF1826/27

8.5.7 PIR2 REGISTER

The PIR2 register contains the interrupt flag bits, as

shown in Register 8-7.

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Enable bit, GIE of the INTCON register.

User software should ensure the

appropriate interrupt flag bits are clear prior

to enabling an interrupt.

REGISTER 8-7: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2

R/W-0/0

R/W-0/0

R/W-0/0

R/W-0/0 R/W-0/0

U-0

U-0

OSFIF

C2IF

C1IF

EEIF

BCL1IF

—

—

bit 7

R/W-0/0

CCP2IF(1)

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2-1

bit 0

OSFIF: Oscillator Fail Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

C2IF: Comparator C2 Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

C1IF: Comparator C1 Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

EEIF: EEPROM Write Completion Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

BCL1IF: MSSP1 Bus Collision Interrupt Flag bit

1 = Interrupt is pending

0 = Interrupt is not pending

Unimplemented: Read as ‘0’

CCP2IF: CCP2 Interrupt Flag bit(1)

1 = Interrupt is pending

0 = Interrupt is not pending

Note 1: PIC16F/LF1827 only.

 2010 Microchip Technology Inc.

Preliminary

DS41391C-page 97

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