OR2T15B7BA352-DB View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
OR2T15B7BA352-DB Datasheet PDF : 200 Pages
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ORCA Series 2 FPGAs
Data Sheet
November 2006
Conļ¬guration Data Format (continued)
Table 9. Conļ¬guration Frame Format and Contents
11111111
Leading headerā4 bits minimum dummy bits
0010
Preamble
Header
ES ID Frame
(Optional)
EVICUED Conļ¬guration
Data
Frame
D IN (repeated for
each data frame)
CT T End of
N Conļ¬guration
Postamble
24-Bit Length Count
1111
0
Pā1
Cā0
Opar, Epar
Addr[10:0] =
11111111111
Prty_En
Reserved [42:0]
ID
111
0
Pā1 or 0
Cā1 or 0
Opar, Epar
Addr[10:0]
A
1
Data Bits
.
.
111
0010011111111111
111111 . . . . .
Conļ¬guration frame length
Trailing headerā4 bits minimum dummy bits
Frame start
Must be set to 1 to indicate data frame
Must be set to 0 to indicate uncompressed
Frame parity bits
ID frame address
Set to 1 to enable parity
Reserved bits set to 0
20-bit part ID
Three or more stop bits (high) to separate frames
Frame start
1 indicates data frame; 0 indicates all frames are written
Uncompressedā0 indicates data and address are supplied;
Compressedā1 indicates only address is supplied
Frame parity bits
Column address in FPGA to be written
Alignment bit (different number of 0s needed for each part)
Write bitāused in uncompressed data frame
Needed only in an uncompressed data frame
.
.
One or more stop bits (high) to separate frames
16 bitsā00 indicates all frames are written
Additional 1s
SELDEISCO Note:
For slave parallel mode, the byte containing the preamble must be 11110010. The number of leading header dummy bits must
be (n * 8) + 4, where n is any nonnegative integer and the number of trailing dummy bits must be (n * 8), where n is any positive
integer. The number of stop bits/frame for slave parallel mode must be (x * 8), where x is a positive integer. Note also that the bit
stream generator tool supplies a bit stream which is compatible with all conļ¬guration modes, including slave parallel mode.
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