AD9269(Rev0) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9269 Datasheet PDF : 40 Pages
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AD9269
In any configuration, the value of Shunt Capacitor C is dependent
on the input frequency and source impedance and may need to
be reduced or removed. Table 9 displays the suggested values to set
the RC network. However, these values are dependent on the
input signal and should be used only as a starting guide.
Table 9. Example RC Network
Frequency Range (MHz)
R Series
(Ω Each)
0 to 70
33
70 to 200
125
C Differential (pF)
22
Open
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 44
shows a typical single-ended input configuration.
1V p-p
49.9Ω
10µF
10µF
AVDD
1kΩ
R
0.1µF 1kΩ
AVDD
C
1kΩ R
0.1µF 1kΩ
VIN+x
ADC
VIN–x
Figure 44. Single-Ended Input Configuration
VOLTAGE REFERENCE
A stable and accurate 1.0 V voltage reference is built into the
AD9269. VREF can be configured using either the internal 1.0 V
reference or an externally applied 1.0 V reference voltage. The
various reference modes are summarized in the sections that
follow. The Reference Decoupling section describes the best-
practices PCB layout of the reference.
Internal Reference Connection
A comparator within the AD9269 detects the potential at the
SENSE pin and configures the reference into two possible modes,
which are summarized in Table 10. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 45), setting VREF to 1.0 V.
VIN+A/VIN+B
VIN–A/VIN–B
ADC
CORE
1.0µF
VREF
0.1µF
SENSE
SELECT
LOGIC
0.5V
ADC
Figure 45. Internal Reference Configuration
If the internal reference of the AD9269 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 46 shows
how the internal reference voltage is affected by loading.
0
–0.5
–1.0
INTERNAL VREF = 0.993V
–1.5
–2.0
–2.5
–3.0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
LOAD CURRENT (mA)
Figure 46. VREF Accuracy vs. Load Current
Table 10. Reference Configuration Summary
Selected Mode
SENSE Voltage (V)
Fixed Internal Reference
AGND to 0.2
Fixed External Reference
AVDD
Resulting VREF (V)
1.0 internal
1.0 applied to external VREF pin
Resulting Differential Span (V p-p)
2.0
2.0
Rev. 0 | Page 21 of 40
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