AD9753-EB(Rev0) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD9753-EB
(Rev.:Rev0)

12-Bit, 300 MSPS High-Speed TxDAC+® D/A Converter

Analog Devices 

AD9753

The center tap on the primary side of the transformer must be

connected to ACOM to provide the necessary dc current path

for both IOUTA and IOUTB. The complementary voltages appear-

ing at IOUTA and IOUTB (i.e., VOUTA and VOUTB) swing

symmetrically around ACOM and should be maintained with

the specified output compliance range of the AD9753. A differ-

ential resistor, RDIFF, may be inserted in applications where the

output of the transformer is connected to the load, RLOAD, via a

passive reconstruction filter or cable. RDIFF is determined by the

transformer’s impedance ratio and provides the proper source

termination that results in a low VSWR.

DIFFERENTIAL COUPLING USING AN OP AMP

An op amp can also be used to perform a differential-to-single-

ended conversion as shown in Figure 21. The AD9753 is configured

with two equal load resistors, RLOAD, of 25 Ω. The differential

voltage developed across IOUTA and IOUTB is converted to a

single-ended signal via the differential op amp configuration.

An optional capacitor can be installed across IOUTA and IOUTB,

forming a real pole in a low-pass filter. The addition of this

capacitor also enhances the op amp’s distortion performance by

preventing the DAC’s high slewing output from overloading the

op amp’s input.

AD9753

IOUTA

IOUTB

25⍀

COPT

225⍀

225⍀

500⍀

25⍀

500⍀

AD8047

Figure 21. DC Differential Coupling Using an Op Amp

The common-mode rejection of this configuration is typically

determined by the resistor matching. In this circuit, the dif-

ferential op amp circuit using the AD8047 is configured to

provide some additional signal gain. The op amp must operate

from a dual supply since its output is approximately ± 1.0 V.

A high-speed amplifier capable of preserving the differential

performance of the AD9753, while meeting other system level

objectives (i.e., cost, power), should be selected. The op

amp’s differential gain, its gain setting resistor values, and

full-scale output swing capabilities should all be considered

when optimizing this circuit.

The differential circuit shown in Figure 22 provides the nec-

essary level-shifting required in a single supply system. In this

case, AVDD, which is the positive analog supply for both the

AD9753 and the op amp, is also used to level-shift the differ-

ential output of the AD9753 to midsupply (i.e., AVDD/2).

The AD8041 is a suitable op amp for this application.

AD9753

IOUTA

IOUTB

225⍀

COPT

225⍀

500⍀

AD8041

1k⍀

25⍀

25⍀

500⍀

AVDD

Figure 22. Single Supply DC Differential Coupled Circuit

SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT

Figure 23 shows the AD9753 configured to provide a unipolar

output range of approximately 0 V to 0.5 V for a doubly termi-

nated 50 Ω cable since the nominal full-scale current, IOUTFS, of

20 mA flows through the equivalent RLOAD of 25 Ω. In this case,

RLOAD represents the equivalent load resistance seen by IOUTA or

IOUTB. The unused output (IOUTA or IOUTB) can be connected to

ACOM directly or via a matching RLOAD. Different values of

IOUTFS and RLOAD can be selected as long as the positive com-

pliance range is adhered to. One additional consideration in

this mode is the integral nonlinearity (INL) as discussed in the

Analog Output section of this data sheet. For optimum INL

performance, the single-ended, buffered voltage output configu-

ration is suggested.

AD9753

IOUTA

IOUTB

IOUTFS = 20mA

25⍀

50⍀

VOUTA = 0V TO 0.5V

50⍀

Figure 23. 0 V to 0.5 V Unbuffered Voltage Output

SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT

Figure 24 shows a buffered single-ended output configuration in

which the op amp performs an I-V conversion on the AD9753

output current. The op amp maintains IOUTA (or IOUTB) at a

virtual ground, thus minimizing the nonlinear output impedance

effect on the DAC’s INL performance as discussed in the

Analog Output section. Although this single-ended configura-

tion typically provides the best dc linearity performance, its ac

distortion performance at higher DAC update rates may be

limited by the op amp’s slewing capabilities. The op amp pro-

vides a negative unipolar output voltage and its full-scale output

voltage is simply the product of RFB and IOUTFS. The full-scale

output should be set within the op amp’s voltage output swing

capabilities by scaling IOUTFS and/or RFB. An improvement in ac

distortion performance may result with a reduced IOUTFS, since

the signal current the op amp will be required to sink will be

subsequently reduced.

–16–

REV. 0

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