ADE3700XT View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ADE3700XT

Analog LCD Display Engine for XGA and SXGA Resolutions

STMicroelectronics 

ADE3700

Register Name

HSYNC_PHASE

VSYNC_PHASE

HENAB_SET_HW_L

HENAB _SET_HW _U

HENAB _RST_HW _L

HENAB _RST_HW _U

VENAB_SET_HW _L

VENAB _SET_HW _U

VENAB _RST_HW _L

VENAB _RST_HW _U

Data Multiplexer

Table 11: Sync Multiplexer Registers (Sheet 4 of 4)

Addr

0x0210

0x0211

0x0212

0x0213

0x0214

0x0215

0x0216

0x0217

0x0218

0x0219

Mode Bits Default

Description

R/W

[7:0] 0x00

R/W

[7:0] 0x00

R

[7:0]

R

[3:0]

R

[7:0]

R

[3:0]

R

[7:0]

R

[3:0]

R

[7:0]

R

[3:0]

number of horizontal pixels/INCLKS that the

generated hsync edge is from the reference

edge. 2’s complement

[-128,127]

number of vertical lines that the generated vsync

edge is from the reference edge. 2’s complement

[-128,127]

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

Actual value used by hardware post shadowing.

2.8 Data Multiplexer

The Data Multiplexer provides the following functions:

q Debug modes (e.g. bit order swap, color swap)

Table 12: Data Mux Registers

Register Name

DMUX_CHANSEL

Addr.

0x0280

Mode Bits Default

Description

[7] 0x0

R/W

[6] 0x0

R/W

[5:3] 0x0

R/W

[2] 0x0

R/W

[1:0] 0x0

Reserved

0: Normal

1: MSB/LSB byte flip

If enabled by [2]

0x0: Reserved

0x1: R & G bytes are swapped

0x2: B & G bytes are swapped

0x3: R => G, G => B, B => R

0x4: R & B bytes are swapped

0x5: R => B, G => R, B => G

0x0, 0x6-0x7: Reserved

0: normal

1: enable color swap

video source select

0x0: ADC data

0x1: nc

0x2: nc

0x3: for test only

37/89

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