ADE7816ACPZ-RL View Datasheet(PDF) - Analog Devices
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Description
Manufacturer
ADE7816ACPZ-RL Datasheet PDF : 48 Pages
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Data Sheet
ADE7816
Table 11 lists the time that is required to execute an HSDC data transfer for all HSDC_CFG register settings.
Table 11. Communication Times for Various HSDC Settings
HXFER[1:0]
HGAP
HSIZE1
01
0
N/A
01
0
N/A
01
1
0
01
1
0
01
1
1
01
1
1
HCLK
0
1
0
1
0
1
Communication Time (μs)
28
56
33.25
66.5
51.625
103.25
1 N/A means not applicable.
HSCLK
HSD
31
0 31
IAWV/IDWV (32)
VWV (32)
0 31
0
IBWV/IEWV (32)
31
0
0000000 (32)
HSA
Figure 44. HSDC Communication for HGAP = 0, HXFER[1:0] = 01, and HSAPOL = 0; HSIZE Is Irrelevant
HSCLK
HSD
HSA
31
0
IAWV/IDWV (32)
31
0
VWV (32)
31
0
IBWV/IEWV (32)
7 HSCLK CYCLES
7 HSCLK CYCLES
31
0
00000000 (32)
Figure 45. HSDC Communication for HSIZE = 0, HGAP = 1, HXFER[1:0] = 01, and HSAPOL = 0
HSCLK
HSD
HSA
31
24
IAWV/IDWV (BYTE 3)
23
16
IAWV/IDWV (BYTE 2)
15
8
IAWV/IDWV (BYTE 1)
7 HSCLK CYCLES
7 HSCLK CYCLES
7
0
00 (BYTE 0)
Figure 46. HSDC Communication for HSIZE = 1, HGAP = 1, HXFER[1:0] = 01, and HSAPOL = 0
Rev. 0 | Page 35 of 48
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