ADS6444IRGCT View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ADS6444IRGCT

QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS

STMicroelectronics 

ADS6445, ADS6444

ADS6443, ADS6442

SLAS531 – MAY 2007

SERIAL REGISTER MAP

www.ti.com

Table 12. Summary of Functions Supported By Serial Interface

REGISTER

ADDRESS

A4 - A0

00

04

0A

0B

0C

0D

10

11

REGISTER FUNCTIONS(1)(2)

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

<RST>

S/W RESET

0

0

0

0

<REF>

INTERNAL

OR

EXTERNAL

<PDN CHD>

POWER

DOWN CH D

<PDN CHC>

POWER

DOWN CHC

<PDN CHB> <PDN CHA>

POWER

POWER

DOWN CH B DOWN CH A

<PDN

GLOBAL>

GLOBAL

POWER

DOWN

0

0

0

0

<CLKIN GAIN>

INPUT CLOCK BUFFER GAIN CONTROL

0

0

<DF>

DATA

0

FORMAT 2S

COMP OR

0

STRAIGHT

BINARY

<PATTERNS>

TEST PATTERNS

0

0

0

0

0

<CUSTOM A>

CUSTOM PATTERN (LOWER 11 BITS)

<FINE GAIN>

FINE GAIN CONTROL (1dB to 6 dB)

0

0

0

0

0

<CUSTOM B>

CUSTOM PATTERN (UPPER 3 BITS)

<OVRD>

OVERRIDE

0

BIT

<COARSE FALLING

0

BYTE-WISE

OR

BIT-WISE

MSB OR

LSB FIRST

GAIN>

COURSE

GAIN

OR RISING

BIT CLOCK

CAPTURE

0

14-BIT OR

16-BIT

SERIALIZE

DDR OR

SDR BIT

CLOCK

1-WIRE OR

2-WIRE

INTERFACE

ENABLE

EDGE

<TERM CLK>

LVDS INTERNAL TERMINATION BIT AND WORD CLOCKS

<LVDS CURR>

LVDS CURRENT SETTINGS

<CURR DOUBLE>

LVDS CURRENT DOUBLE

WORD-WISE CONTROL

0

0

0

0

<TERM DATA>

LVDS INTERNAL TERMINATION - DATA OUTPUTS

(1) The unused bits in each register (shown by blank cells in above table) must be programmed as 0.

(2) Multiple functions in a register can be programmed in a single write operation.

20

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