ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
Asynchronous Memory Write Cycle Timing
Table 27. Asynchronous Memory Write Cycle Timing
Parameter
Timing Requirements
tSARDY
ARDY Setup Before CLKOUT
tHARDY
ARDY Hold After CLKOUT
Switching Characteristics
tDDAT
tENDAT
tDO
tHO
DATA15–0 Disable After CLKOUT
DATA15–0 Enable After CLKOUT
Output Delay After CLKOUT1
Output Hold After CLKOUT 1
1 Output pins/balls include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, AWE.
Min
Max
Unit
4
ns
0.2
ns
6
ns
0
ns
6
ns
0.8
ns
CLKOUT
AMSx
SETUP
2 CYCLES
PROGRAMMED
WRITE
ACCESS
2 CYCLES
ACCESS
EXTEND HOLD
1 CYCLE 1 CYCLE
tDO
tHO
ABE1–0
ADDR19–1
AWE
ARDY
DATA 15–0
tDO
tSARDY
tHARDY
tENDAT
tSARDY
tHO
tHARDY
tDDAT
Figure 11. Asynchronous Memory Write Cycle Timing
Rev. B | Page 30 of 68 | January 2011