Figure 11-1. Power-Down Exit Waveform
INT0
INT1
XTAL1
Active phase
Power-down phase Oscillator restart phase
Active phase
Mode
Idle
Power Down
Exit from power-down by reset redefines all the SFRs, exit from power-down by external inter-
rupt does no affect the SFRs.
Exit from power-down by either reset or external interrupt does not affect the internal RAM
content.
Note:
NOTE: If idle mode is activated with power-down mode (IDL and PD bits set), the exit sequence is
unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and idle mode is
not entered.
Table 11-1. The state of ports during idle and power-down modes
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
PORT3
External
1
1
Floating
Port Data
Address
Port Data
External
0
0
Floating
Port Data
Port Data
Port Data
22 AT/TS80C31X2
4428D–8051–08/05