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ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

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Description
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ATMEGA64L-8MI Datasheet PDF : 363 Pages
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ATmega64(L)
Data Registers
The data registers are selected by the JTAG instruction registers described in section
“Programming Specific JTAG Instructions†on page 312. The data registers relevant for
programming operations are:
• Reset Register
• Programming Enable Register
• Programming Command Register
• Virtual Flash Page Load Register
• Virtual Flash Page Read Register
Reset Register
The Reset Register is a Test Data Register used to reset the part during programming. It
is required to reset the part before entering programming mode.
A high value in the Reset Register corresponds to pulling the External Reset low. The
part is reset as long as there is a high value present in the Reset Register. Depending
on the Fuse settings for the clock options, the part will remain reset for a Reset Time-out
Period (refer to “Clock Sources†on page 36) after releasing the Reset Register. The
output from this data register is not latched, so the reset will take place immediately, as
shown in Figure 126 on page 256.
Programming Enable Register
The Programming Enable Register is a 16-bit register. The contents of this register is
compared to the programming enable signature, binary code 1010_0011_0111_0000.
When the contents of the register is equal to the programming enable signature, pro-
gramming via the JTAG port is enabled. The register is reset to 0 on Power-on Reset,
and should always be reset when leaving Programming mode.
Figure 150. Programming Enable Register
TDI
D
A
$A370
=
T
A
D
Q
Programming Enable
ClockDR & PROG_ENABLE
TDO
2490G–AVR–03/04
315

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