ATMEGA64-16MI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATMEGA64-16MI
Atmel Corporation
ATMEGA64-16MI Datasheet PDF : 363 Pages
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When the BOOTRST Fuse is programmed and the Boot section size set to 8K bytes, the
most typical and general program setup for the Reset and Interrupt Vector Addresses is:
Address Labels Code
Comments
.org 0x0002
0x0002
jmp
EXT_INT0 ; IRQ0 Handler
0x0004
jmp
EXT_INT1 ; IRQ1 Handler
...
...
...
;
0x0044
jmp
SPM_RDY ; Store Program Memory Ready Handler
;
.org 0x7000
0x7000 RESET: ldi
r16,high(RAMEND); Main program start
0x7001
out
SPH,r16 ; Set Stack Pointer to top of RAM
0x7002
ldi
r16,low(RAMEND)
0x7003
0x7004
out
SPL,r16
sei
; Enable interrupts
0x7005
<instr> xxx
Moving Interrupts Between
Application and Boot Space
MCU Control Register –
MCUCR
When the BOOTRST Fuse is programmed, the Boot section size set to 8K bytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typ-
ical and general program setup for the Reset and Interrupt Vector Addresses is:
Address Labels Code
Comments
;
.org 0x7000
0x7000
jmp
0x7002
jmp
RESET ; Reset handler
EXT_INT0 ; IRQ0 Handler
0x7004
jmp
EXT_INT1 ; IRQ1 Handler
...
...
...
;
0x7044
jmp
SPM_RDY ; Store Program Memory Ready Handler
0x7046 RESET: ldi
r16,high(RAMEND); Main program start
0x7047
out
SPH,r16 ; Set Stack Pointer to top of RAM
0x7048
ldi
r16,low(RAMEND)
0x7049
0x704A
out
SPL,r16
sei
; Enable interrupts
0x704B
<instr> xxx
The General Interrupt Control Register controls the placement of the Interrupt Vector
table.
Bit
Read/Write
Initial Value
7
6
5
SRE SRW10
SE
R/W
R/W
R/W
0
0
0
4
SM1
R/W
0
3
SM0
R/W
0
2
SM2
R/W
0
1
IVSEL
R/W
0
0
IVCE
R/W
0
MCUCR
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the
Flash memory. When this bit is set (one), the Interrupt Vectors are moved to the begin-
ning of the Boot Loader section of the Flash. The actual address of the start of the Boot
Flash section is determined by the BOOTSZ Fuses. Refer to the section “Boot Loader
Support – Read-While-Write Self-programming” on page 277 for details. To avoid unin-
tentional changes of Interrupt Vector tables, a special write procedure must be followed
to change the IVSEL bit:
62 ATmega64(L)
2490G–AVR–03/04
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