36.9 8067D – 07/08
XMEGA A1
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36.10 8067C – 06/08
Updated “Ordering Information” on page 2.
Updated “Peripheral Module Address Map” on page 58.
Inserted “Interrupt Vector Summary” on page 56.
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36.11 8067B – 05/08
Updated the Front page and “Features” on page 1.
Updated the “DC Characteristics” on page 67.
Updated Figure 3-1 on page 6.
Added “Flash and EEPROM Page Size” on page 15.
Updated Table 33-6 on page 71 with new data: Gain Error, Offset Error and Signal -to-Noise
Ratio (SNR).
Updated Errata “ATxmega128A1 rev. G” on page 94.
8067L–AVR–08/10
1. Updated “Pinout/Block Diagram” on page 3 and “Pinout and Pin Functions” on page 49.
2. Added XMEGA A1 Block Diagram, Figure 3-1 on page 6.
3. Updated “Overview” on page 5 included the XMEGA A1 explanation text on page 6.
4. Updated AVR CPU “Features” on page 8.
5. Updated Event System block diagram, Figure 9-1 on page 18.
6. Updated “PMIC - Programmable Multi-level Interrupt Controller” on page 25.
7. Updated “AC - Analog Comparator” on page 44.
8. Updated “Alternate Pin Function Description” on page 49.
9. Updated “Alternate Pin Functions” on page 51.
10. Updated “Typical Characteristics” on page 76.
11. Updated “Ordering Information” on page 2.
12. Updated “Overview” on page 5.
13. Updated Figure 6-1 on page 8.
14. Inserted a new Figure 15-1 on page 32.
15. Updated Speed grades in “Speed” on page 69.
16. Added a new ATxmega384A1 device in “Features” on page 1, updated “Ordering Information” on
page 2 and “Memories” on page 10.
17. Replaced the Figure 3-1 on page 6 by a new XMEGA A1 detailed block diagram.
18. Inserted Errata “ATxmega128A1 rev. G” on page 94.
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