ATXMEGA64A1-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATXMEGA64A1-CU Datasheet PDF : 107 Pages
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XMEGA A1
– 1x gain:
– 2x gain:
– 4x gain:
– 8x gain:
– 16x gain:
– 32x gain:
– 64x gain:
2.4 V
1.2 V
0.6 V
300 mV
150 mV
75 mV
38 mV
Problem fix/Workaround
Keep the amplified voltage output from the ADC gain stage below 2.4 V in order to get a cor-
rect result, or keep ADC voltage reference below 2.4 V.
4. The ADC has up to ±2 LSB inaccuracy
The ADC will have up to ±2 LSB inaccuracy, visible as a saw-tooth pattern on the input volt-
age/ output value transfer function of the ADC. The inaccuracy increases with increasing
voltage reference reaching ±2 LSB with 3V reference.
Problem fix/Workaround
None, the actual ADC resolution will be reduced with up to ±2 LSB.
5. TWI, a general address call will match independent of the R/W-bit value.
When the TWI is in Slave mode and a general address call is issued on the bus, the TWI
Slave will get an address match regardless of the R/W-bit (ADDR[0] bit) value in the Slave
Address Register.
Problem fix/Workaround
Use software to check the R/W-bit on general call address match.
6. TWI, the minimum I2C SCL low time could be violated in Master Read mode
When the TWI is in Master Read mode and issuing a Repeated Start on the bus, this will
immediately release the SCL line even if one complete SCL low period has not passed. This
means that the minimum SCL low time in the I2C specification could be violated.
Problem fix/Workaround
If this causes a potential problem in the application, software must ensure that the Repeated
Start is never issued before one SCL low time has passed.
7. TWI, the address-mask features is missing
The address-mask functionality is missing, so the TWI cannot perform address match on
more than one address.
Problem fix/Workaround
If the TWI must respond to multiple addresses, enable Promiscuous Mode for the TWI to
respond to all address and implementing the address-mask function in software
91
8067L–AVR–08/10
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